IEC 62501: Electrical Testing of VSC Valves for HVDC Power Transmission — Engineering Guide

IEC 62501 is the international standard governing electrical testing of voltage source converter (VSC) valves for high-voltage direct current (HVDC) power transmission systems. Published originally in 2009 and consolidated with amendments in 2017 (edition 1.2), the standard defines type tests, production tests, and optional tests for VSC valves used in both two-level and modular multilevel converter (MMC) topologies. As VSC-HVDC technology increasingly dominates long-distance power transmission and offshore wind integration, IEC 62501 has become an essential reference for power electronics engineers, valve manufacturers, and transmission system operators worldwide.

±800 kV
Maximum DC Voltage
MMC + 2L
Converter Topologies Covered
5+
Type Test Categories
GW Scale
Typical Valve Power Rating

🔌 1. Scope and Valve Topologies

1.1 What IEC 62501 Covers

IEC 62501 applies to VSC valves that form part of an HVDC transmission system. It covers valves based on Insulated Gate Bipolar Transistors (IGBTs) and their associated gate drive units, cooling systems, and valve control electronics. The standard is applicable to both:

  • Two-level (2L) converters: The classic VSC topology with six IGBT arms, now used primarily at lower voltages or in back-to-back configurations
  • Modular Multilevel Converters (MMC): The dominant modern topology using hundreds of submodules per valve arm, achieving near-sinusoidal output with minimal filtering

The standard defines valve electrical characteristics including voltage withstand, current conduction, switching behavior, and losses measurement. It also addresses the unique considerations for valves in bi-directional power flow configurations.

1.2 Operating States and Definitions

A key contribution of IEC 62501 is its systematic classification of VSC valve operating states. This framework underpins all test definitions:

  • Blocked state: Valve cannot conduct current in either direction regardless of voltage polarity
  • Active state: Valve can be turned on and off by gate drive signals, conducting current in both directions
  • Bypassed state (MMC): Submodule output terminals are short-circuited (also called “inserted” or “bypassed”)
  • Freewheel state: Current flows through the anti-parallel diode after IGBT turn-off
💡 Engineering Insight — Submodule Testing for MMC
For MMC valves with hundreds of submodules, testing every submodule individually at full valve rating is impractical. IEC 62501 allows type testing on a representative valve section combined with routine tests on each submodule. The valve section must include at least three submodules and reproduce the voltage distribution, thermal conditions, and control interface of the full valve. This section testing approach has been validated across dozens of ±320 kV to ±800 kV VSC-HVDC projects.

⚙️ 2. Type Test Requirements

2.1 Dielectric Type Tests

Dielectric testing verifies the valve’s ability to withstand the specified voltage stresses. The test program includes:

  • Lightning impulse voltage test (1.2/50 μs, both polarities)
  • Switching impulse voltage test (250/2500 μs)
  • DC voltage withstand test (applied for 60 minutes minimum)
  • AC voltage withstand test (10-second application)

Each test is performed between valve terminals and ground, between phases, and across individual valve sections as applicable. The standard specifies acceptance criteria including no disruptive discharge during impulse tests and leakage current limits during DC withstand.

2.2 Operational Type Tests

Test Name Test Conditions Duration Key Pass Criteria
Maximum continuous operating test Rated DC voltage + rated AC current ≥ 1 hour Temperature within limits, no flashover
Overcurrent test 1.1 x rated current ≥ 2 hours Stable temperature, no thermal runaway
Short-circuit current test Fault current from AC system 10 ms Successful turn-off, no valve damage
Minimum DC voltage test Near-zero DC voltage 10 min Stable control, current regulation
Loss measurement test Various operating points Per measurement Accuracy within ±5% of calculated
⚠️ Critical Consideration — Stray Capacitance Effects
At the high dV/dt rates typical of VSC valves (5–15 kV/μs), stray capacitance within the valve structure causes significant displacement currents that can cause false gate-drive triggering. IEC 62501 requires that operational tests verify immunity to these effects. In practice, designers must pay close attention to the impedance of gate drive power supplies and the layout of fibre-optic control links within the valve.

💡 3. Engineering Insights for HVDC Valve Design

Application of IEC 62501 in real VSC-HVDC projects has yielded several important design lessons:

  • Voltage distribution non-uniformity: In an MMC valve with 200+ submodules per arm, the voltage distribution across series-connected submodules is never perfectly uniform due to component tolerances, temperature gradients, and control timing differences. The standard requires verification of voltage balancing at all operating points.
  • Thermal management under fault conditions: The short-circuit current test (Clause 4.3 of the standard) stresses the valve at levels that, while brief, can produce instantaneous junction temperatures exceeding the normal limit by 30–50 K. IGBT module manufacturers must approve these transient over-temperature excursions.
  • Losses measurement controversy: The standard provides two methods for losses measurement — direct electrical measurement and calorimetric (heat balance) measurement. The two methods often disagree by 5–15% on high-power valves. Most transmission system operators now require calorimetric measurement as the reference method, with electrical measurement used for comparison.
✅ Recommendation — Synthetic Test Circuits
For practical reasons, full-power testing of complete VSC valves at rated DC voltage is rarely feasible due to facility limitations. IEC 62501 permits the use of synthetic test circuits that reproduce the electrical stresses on a representative valve section. The most common synthetic circuit is the “back-to-back” configuration where two valve sections test each other. When designing synthetic tests, ensure that the voltage stress, current stress, and dV/dt are simultaneously representative — a common failing of poorly designed synthetic circuits is reproducing voltage and current but not dV/dt.

❓ Frequently Asked Questions

Q1: How does IEC 62501 differ from IEC 60700-1 (for LCC HVDC valves)?
IEC 60700-1 covers line-commutated converter (LCC) HVDC valves using thyristors. IEC 62501 covers self-commutated VSC valves using IGBTs. The key difference is that VSC valves can turn off fault currents independently and require testing of gate-turn-off capability, while LCC valves rely on the AC grid for commutation. Additionally, VSC valves have higher switching frequencies and require different loss measurement methods.
Q2: How many submodules are typically tested during MMC type testing?
For the type test on a representative valve section, a minimum of three submodules is required. For routine production tests, 100% of submodules are tested at rated voltage and current (or at a level that provides equivalent stress). The high number of submodules (often 3000–6000 per station) makes this production testing a significant cost and schedule factor.
Q3: Does IEC 62501 cover submodule capacitor testing?
IEC 62501 focuses on valve-level tests. Individual component testing of submodule capacitors follows IEC 60143 (series capacitors) or relevant capacitor standards. However, the standard does require that the valve’s capacitor voltage balancing algorithm be verified during operational type tests, which indirectly validates capacitor performance.
Q4: What is the current status of the standard?
IEC 62501:2009 + AMD1:2014 + AMD2:2017 CSV (consolidated version 1.2) is the current edition. A revision to edition 2.0 is under development by IEC TC 22/SC 22F to cover advances in MMC technology, higher voltage levels (±800 kV and beyond), and experience from operational HVDC projects worldwide.
© 2026 TNLab — This article is for engineering education and reference purposes.

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