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IEC 62490-1: ESL Measuring Method for Lead-Terminal Capacitors in Electronic Equipment
Precision measurement of equivalent series inductance (1 nH – 10 nH) using impedance analysis, short compensation jigs, and spacer techniques
Introduction to IEC 62490-1
IEC 62490-1, titled “ESL measuring method — Part 1: Capacitors with lead terminal for use in electronic equipment,” establishes a standardized method for measuring the Equivalent Series Inductance (ESL) of leaded capacitors in the range of 1 nH to 10 nH. As switching frequencies in power electronics, DC-DC converters, and RF circuits continue to rise — often exceeding 1 MHz for mainstream designs and 10 MHz for advanced applications — the parasitic inductance of passive components has become a critical design parameter that directly impacts circuit performance, EMI emissions, and power integrity.
At 40 MHz measurement frequency, even 1 nH of series inductance presents an impedance of approximately 0.25 Ω. While seemingly small, in a low-impedance power distribution network carrying 10 A of ripple current, this translates to 2.5 V of switching noise — a significant fraction of a 1.8 V logic supply voltage.
Prior to IEC 62490-1, ESL measurement results varied widely between laboratories because each test setup introduced different parasitic inductances from the test fixture itself. The standard solves this problem by specifying a precisely defined measurement jig, a short compensation jig with identical material and geometry to the capacitor’s lead wires, and a two-step spacer method that mathematically cancels fixture inductance while preserving the inductance contribution of the lead wires at the seating plane.
Measurement Apparatus and Compensation Techniques
The standard defines three essential hardware components that together enable reproducible ESL measurements. Understanding their design and function is critical for implementing the standard correctly.
| Component | Material / Dimensions | Function | Key Requirement |
|---|---|---|---|
| Measurement jig | Screw-fixation electrodes, non-magnetic | Holds capacitor leads securely | Electrodes move only in one axis; no rotation |
| Short compensation jig | Same material as lead wire (e.g., tinned Cu), shank 5-10 mm | Simulates zero-inductance reference | Lead spacing tolerance ±0.25 mm |
| Short compensation spacer | Non-magnetic, thickness 1.5 ±0.1 mm | Establishes reference plane for short circuit | Same pitch as capacitor lead spacing |
| Measurement spacer | Non-magnetic, thickness = short spacer + P/2 | Recovers lead inductance in final reading | P/2 addition relative to short spacer |
The measurement jig is a potential source of significant error. If the adjustable electrode rotates during lead insertion (rather than translating linearly), the measuring point shifts and introduces an uncontrolled inductance error. The standard specifically warns against this and includes a figure illustrating the correct and incorrect clamping methods.
Engineering Insights: The Measurement Procedure
Open and Short Compensation
Before ESL measurement, two calibration steps are mandatory. First, open compensation is performed with the measurement jig connected but without any component between the electrodes, eliminating stray capacitance and residual inductance of the test leads and jig structure. Second, short compensation uses the short compensation jig (a precision wire rod of the same material as the capacitor’s lead wires) held by the short compensation spacer. This step cancels the inductance of the lead wire segment between the seating plane and the electrode contact point. The brilliance of this method is that the short compensation jig has identical material properties and geometry to the actual capacitor leads, so the compensation is valid for the specific lead material and diameter.
ESL Measurement with the Measurement Spacer
After calibration, the short compensation spacer is replaced with the thicker measurement spacer. The capacitor under test is inserted with its leads passing through the measurement spacer. The key engineering insight is that the measurement spacer is thicker than the short compensation spacer by exactly P/2, where P is the lead spacing. This deliberate thickness difference adds back the inductance of the lead segment of length P that was canceled during short compensation. The impedance analyzer reading therefore represents the true ESL of the capacitor measured at the seating plane — the plane where the capacitor body meets the printed circuit board.
This cancellation-and-recovery technique is a clever metrological solution. Rather than trying to eliminate fixture parasitics through shielding or physical design (which is impractical at nH-level inductances), the standard embraces controlled parasitics and cancels them through a well-defined differential measurement procedure. The result is reproducibility across different laboratories and test setups.
Measurement Conditions and Reporting
IEC 62490-1 specifies measurement at 40 MHz with a signal level of 0.5 V to 1.0 V RMS, using an impedance analyzer with basic accuracy of ±0.08% or better and the ability to measure 3 mΩ or less. Lead terminals are cut to 5 mm to 10 mm length, and care must be taken not to bend them. The test report must include the measuring instrument and test fixture details, measurement frequency and signal level, measurement point, and the measured ESL value.
Practical Applications in Power Integrity Engineering
The ESL measurement method standardized by IEC 62490-1 has direct practical relevance for power distribution network (PDN) design in high-speed digital and RF systems. Modern system-on-chip (SoC) devices with multiple power domains operating at gigahertz clock frequencies require decoupling capacitor networks with total ESL below 100 pH to maintain supply voltage within ±3% tolerance. While individual capacitor ESL is in the 1-10 nH range, the parallel combination of multiple capacitors, combined with careful PCB layout techniques (short and wide traces, direct via-in-pad connections), can achieve the required low-inductance PDN.
The standard’s measurement methodology is particularly valuable for component evaluation and qualification in the design phase. Design engineers can use the procedure to compare ESL specifications from different manufacturers on an equal basis, assess the impact of lead length on ESL (the standard shows that longer leads directly increase ESL), and validate SPICE models used for PDN simulation. The 40 MHz measurement frequency is chosen because it falls in the frequency range where typical power integrity problems manifest — switching noise from DC-DC converters and the mid-frequency decoupling range (1 MHz to 100 MHz) where capacitor ESL begins to dominate over capacitance.
For PDN designers, a useful rule of thumb derived from the standard is that each millimeter of lead or via length adds approximately 0.5 nH to 1 nH of series inductance. This means that a capacitor with 5 mm leads will have 2.5 nH to 5 nH more ESL than the same capacitor mounted with 0.5 mm leads — a dramatic difference that underscores the importance of minimizing interconnect inductance in high-speed designs.
FAQs
Q: Why is ESL measurement important for modern electronic design?
A: With rising switching frequencies in power electronics and digital circuits, parasitic inductance causes voltage ripple, EMI, and switching losses. Knowing the precise ESL of decoupling capacitors is essential for power integrity simulation and PDN design.
A: With rising switching frequencies in power electronics and digital circuits, parasitic inductance causes voltage ripple, EMI, and switching losses. Knowing the precise ESL of decoupling capacitors is essential for power integrity simulation and PDN design.
Q: What is the ESL range covered by IEC 62490-1?
A: The standard covers capacitors with ESL values from 1 nH to 10 nH, which encompasses most leaded ceramic and film capacitors used in high-frequency power applications.
A: The standard covers capacitors with ESL values from 1 nH to 10 nH, which encompasses most leaded ceramic and film capacitors used in high-frequency power applications.
Q: Can this method be used for surface-mount (SMD) capacitors?
A: No. IEC 62490-1 specifically addresses capacitors with lead terminals. A separate standard or measurement methodology is needed for SMD capacitors, which have different parasitic characteristics due to their different geometry and mounting method.
A: No. IEC 62490-1 specifically addresses capacitors with lead terminals. A separate standard or measurement methodology is needed for SMD capacitors, which have different parasitic characteristics due to their different geometry and mounting method.
Q: What is the significance of the 40 MHz measurement frequency?
A: At 40 MHz, the inductive impedance dominates over the capacitive impedance for capacitors in the 1 nH to 10 nH ESL range, ensuring that the measurement accurately reflects the inductive component. Lower frequencies would be dominated by the capacitor’s capacitance, making ESL extraction unreliable.
A: At 40 MHz, the inductive impedance dominates over the capacitive impedance for capacitors in the 1 nH to 10 nH ESL range, ensuring that the measurement accurately reflects the inductive component. Lower frequencies would be dominated by the capacitor’s capacitance, making ESL extraction unreliable.
