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IEC 62116:2014 — Utility-Interconnected PV Inverters — Test Procedure of Islanding Prevention Measures
Standard Snapshot: IEC 62116 provides a consensus test procedure to evaluate the efficacy of islanding prevention measures (anti-islanding) in utility-interconnected PV inverters. It defines test circuits, equipment specifications, test conditions, and pass/fail criteria for determining whether an inverter is “non-islanding.”
1. Scope and Background
IEC 62116:2014 (2nd edition) specifies a standardized test procedure for evaluating the performance of automatic islanding prevention measures in single or multi-phase utility-interactive PV inverters. Islanding occurs when a portion of the utility grid containing both load and generation becomes isolated from the main grid but continues to operate. This condition is hazardous because it can energize lines thought to be dead, create out-of-synchronization reclosure, and damage equipment through uncontrolled voltage and frequency.
The test procedure quantifies the “run-on time” (tR) — the interval between grid disconnection and cessation of inverter output. Inverters meeting the requirements are considered “non-islanding” as defined in IEC 61727.
| Parameter | Test Condition A (100 %) | Test Condition B (50-66 %) | Test Condition C (25-33 %) |
|---|---|---|---|
| Active power output | 100 % rated | 50-66 % rated | 25-33 % rated |
| Quality factor (Qf) | 1 ± 0.1 | 1 ± 0.1 | 1 ± 0.1 |
| Load imbalance (real) | ±2 %, ±5 % | N/A | N/A |
| Load imbalance (reactive) | ±1 %, ±3 % | ±1 % | ±1 % |
2. Test Circuit and Equipment
2.1 Test Circuit Configuration
The test circuit (Figure 1 of the standard) consists of an AC power source simulating the utility grid, a DC power source simulating the PV array (or a PV array simulator), the equipment under test (EUT — the inverter), and a parallel RLC load bank. A switch (S1) connects/disconnects the grid simulator, and measurement instruments capture voltage, current, frequency, and timing parameters.
Engineering Insight: The RLC load bank is tuned to resonate at the grid frequency (50/60 Hz) with a specified quality factor (Qf = 1). This creates the “worst-case” load condition for islanding detection — a resonant load that minimizes the change in voltage and frequency when the grid disconnects. The Qf = 1 value represents a realistic worst case for residential and commercial installations.
2.2 DC Power Source Requirements
The 2014 edition expanded the acceptable DC source types and clarified their specifications. A PV array simulator is the preferred option, but an actual PV array or a current/voltage limited DC power supply with series resistance may also be used. The critical requirement is that the DC source does not limit the maximum EUT input current during transient islanding conditions.
| DC Source Type | Advantages | Limitations |
|---|---|---|
| PV array simulator | Programmable I-V curve, high accuracy, repeatable | High cost, complex setup |
| Actual PV array | Most realistic, no simulator artifacts | Weather dependent, not repeatable |
| DC supply with series R | Simple, low cost | Limited realism, poor transient response |
3. Test Procedure and Quality Factor
3.1 Quality Factor (Qf)
A critical concept in IEC 62116 is the Quality Factor (Qf) of the test load. Qf is defined as the ratio of reactive power to active power in the resonant circuit:
Qf = R × √(C/L) = (1/P) × √(QL × QC)
Higher Qf makes islanding harder to detect because the resonant load better sustains the voltage and frequency within normal operating ranges. The standard specifies Qf = 1 ± 0.1 for all test conditions.
Key Insight: The selection of Qf = 1 was a deliberate engineering compromise. Real-world loads typically have Qf values between 0.5 and 2 for residential/commercial installations. A higher Qf (e.g., 2.5) would represent a more difficult detection scenario but does not reflect typical installations. The standard’s choice of Qf = 1 represents a balance between realistic worst-case conditions and practical testability.
3.2 Test Conditions and Pass/Fail Criteria
The standard defines three test conditions at different power output levels, each with specific load imbalance scenarios. The EUT must be tested at each condition multiple times (typically 10 runs per condition). The pass/fail criterion is based on the measured run-on time (tR) — the time from grid disconnection to output cessation.
The acceptance criteria require that the inverter cease output within 2 seconds for all test runs, with no sustained islanding condition observed. Some national standards may specify more stringent limits (e.g., 0.2 seconds per IEEE 1547 in the United States).
4. Documentation Requirements
The standard specifies detailed documentation requirements including: manufacturer-specified inverter trip settings (voltage and frequency thresholds), complete test results for all conditions and runs, test equipment specifications and calibration dates, ambient conditions during testing, and any anomalies observed.
Pro Tip: Tables 8, 9, and 10 in the standard provide template formats for documenting test results. Using these standardized templates helps ensure that test reports are complete and comparable across different laboratories and inverter models.
5. Engineering Design Insights
- Active vs. passive anti-islanding: The standard is technology-neutral and does not prescribe specific anti-islanding methods. Modern inverters typically use a combination of passive methods (voltage/frequency monitoring, rate of change of frequency) and active methods (frequency drift, impedance measurement, Sandia Frequency Shift).
- Multi-phase considerations: For three-phase inverters, the standard requires testing with load imbalances across phases, as balanced three-phase islanding is generally easier to detect than single-phase islanding due to reduced power flow on individual phases.
- Gate blocking signal: Annex C discusses the use of a gate blocking signal as an alternative islanding detection mechanism, particularly relevant for inverters with integrated anti-islanding relays.
Critical Note: Islanding prevention is not just a regulatory requirement — it is essential for the safety of utility lineworkers. Inverters without effective anti-islanding can continue to energize distribution lines after grid disconnection, creating a potentially fatal hazard for personnel working on what they believe to be de-energized equipment.
Frequently Asked Questions
Q1: What is the difference between the 2008 and 2014 editions of IEC 62116?
Key changes include: updated DC power source specifications (5.2), modified AC load specifications (5.4), revised test condition power levels (from 90%/10% to 75%/20% for certain parameters), updated voltage and frequency trip settings reference to national standards, and improved documentation templates.
Q2: Can the test procedure be applied to multi-phase inverters?
Yes, Clause 6 specifically addresses testing of single or multi-phase inverters. For multi-phase inverters, the load imbalance conditions in Tables 6 and 7 must be applied to create realistic test scenarios.
Q3: What is the significance of the quality factor in anti-islanding testing?
The quality factor (Qf) represents how sharply the load resonates at the grid frequency. A higher Qf makes islanding harder to detect. Qf = 1 represents a realistic worst case for typical installations.
Q4: Does the standard apply to energy storage inverters (battery inverters)?
The standard was developed for PV inverters but the scope notes that it may be applied to other utility-interconnected systems (including battery inverters and microturbines) with appropriate technical review. The fundamental test methodology is applicable, but some parameters may need adjustment.
