💻 IEC 60552 – CAMAC, Organization of Multi-Crate Systems (Parallel Branch Highway)



IEC 60552 Ed. 1.0 (1977) | International Electrotechnical Commission | CAMAC — Organization of multi-crate systems

📋 Scope and the CAMAC Architecture

IEC 60552 defines the Parallel Branch Highway specification for interconnecting multiple crates in CAMAC (Computer Automated Measurement And Control) systems. CAMAC is a classic modular bus platform for nuclear electronics and data acquisition systems developed in the late 1960s by the ESONE Committee of CERN (European Organization for Nuclear Research), standing alongside the NIM standard. A single CAMAC crate accommodates 25 slots (slots 1–24 for functional modules, slot 25 reserved for the crate controller CC), with intra-crate communication via the Dataway bus. IEC 60552 addresses the next higher interconnection level: how to connect up to seven CAMAC crates via a parallel branch highway to a Branch Driver, which in turn interfaces to the computer’s I/O channel. This topology scales the system to a maximum of 7 × 23 = 161 independent functional modules (after deducting one CC per crate), satisfying the large-scale, high-channel-density data acquisition demands of large scientific experiments such as nuclear physics research, reactor control, and accelerator beam diagnostics. Electrical specifications for the parallel branch highway are based on TTL levels (0/5 V), a 66-conductor cable (twisted pairs), 100 Ω transmission-line impedance, and a maximum total cable length of 50 m.

🔬 Parallel Branch Highway Protocol and Signals

The parallel branch highway employs a command-response protocol. The Branch Driver (master) controls the entire system via address lines (4-bit station address to select one of seven crates), command lines (5-bit opcode defining read/write/control), plus 24 read lines and 24 write lines (each corresponding to one slot within a crate). A branch-highway operation is essentially the “projection” of a single-crate Dataway operation onto the multi-crate system—each branch-bus cycle equates to one internal Dataway cycle in the selected crate.

Signal / Parameter	Definition	Spec / Value	Direction
Station Address (N, 4 lines)	Select 1 of 7 crates (encoded 1–7)	TTL, 0 = V active	Driver → Crate
Sub-Address (A, 4 lines)	Module sub-address within crate	TTL, 0 = V active	Driver → Crate
Function Code (F, 5 lines)	Defines 1 of 32 operations	F(0)–F(31), TTL levels	Driver → Crate
Read Lines (R1–R24)	Parallel read of 24 module data bits	TTL per line, differential drive	Crate → Driver
Write Lines (W1–W24)	Parallel write of 24 module data bits	TTL per line, differential drive	Driver → Crate
LAM Lines (Look-At-Me)	Module service request (interrupt)	24 independent LAM signals (1 per module)	Crate (Module) → Driver
Response Lines (Q, X)	Module response status (Q=data valid, X=cmd accepted)	TTL, open-collector	Crate (Module) → Driver
Bus Cycle Time	Time to complete one command-response	Typical 1 μs	—

🏗️ Physical Implementation and Constraints of Multi-Crate Systems

IEC 60552 defines strict physical topology constraints to ensure signal integrity. The parallel branch bus uses a daisy-chain topology—the Branch Driver sits at the chain head, with signals passing sequentially through each crate’s Type A Branch Highway Adapter. Inter-crate cables are 66-conductor twisted-pair ribbon cables, each signal wire twisted with its paired return, characteristic impedance Z₀ = 100 Ω ± 10%. Termination: at the distant end of the bus chain (after the last crate), a 100 Ω terminating resistor must be installed on each signal pair to prevent signal reflections causing data errors. Because the branch highway relies on mixed TTL single-ended-to-differential drive technology, the maximum total cable length is constrained by matching signal flight time to the bus cycle rhythm: the standard requires total propagation delay not to exceed 200 ns (approximately 40 m of standard cable), with the typical 50 m limit already inclusive of cumulative delays inside the Branch Driver, crate adapters, and modules. In laboratory physical layouts, seven crates are typically distributed along the accelerator beamline at 3–4 m spacing, forming a classic distributed acquisition architecture. When system capacity beyond seven crates is needed, multiple Branch Drivers can be deployed (the computer equipped with multiple I/O interfaces, each driving an independent branch highway), enabling system expansion to hundreds of modules.

⚠️ Engineering Design Insight: The most vexing failure mode in CAMAC parallel branch highway systems is spurious triggering of LAM (Look-At-Me interrupt request) signals. The 24 LAM signals use an open-collector wire-OR topology—any single LAM activation pulls the common L-request line low to signal the Branch Driver. In real systems, terminal oxidation, crate power-supply ripple coupling onto the LAM bus, and transient bounce during branch-highway cable connector insertion/extraction can all produce microsecond-duration false LAM pulses. Because CAMAC interrupt response latency is extremely fast (typically <3 μs), these false interrupts severely degrade data acquisition efficiency—the computer spends significant CPU time responding to false interrupts and polling 24 modules' LAM status only to find no genuine request. Engineering remedies include: LAM debounce circuitry in the Branch Driver (typical window 1–5 μs); software-level "double-query" strategy (upon interrupt, read the LAM status register twice consecutively and confirm the interrupt valid only when both values match); and using gold-palladium alloy plating on critical connector pins (vastly superior to standard tin plating, with oxidation rate two orders of magnitude lower). Another concern: the CAMAC crate +6 V power rail integrity—the total +6 V current of 23 modules in a crate can easily exceed 60 A, and NIM-compatible nuclear electronics modules have extremely high +6 V ripple sensitivity (<5 mVpp requirement). Therefore, CAMAC crate power supplies must employ remote sensing technology to compensate the DC voltage drop (I × R loss typically 200–500 mV) from the power-supply output terminals to the Dataway connectors.

🔑 Bottom Line: IEC 60552, the CAMAC Parallel Branch Highway standard, is a forerunner of distributed data acquisition bus technology. Although contemporary experimental physics has migrated to VME, PXIe, and Ethernet-based distributed acquisition, the fundamental paradigms established by the CAMAC standard—hierarchical bus architecture, command-response protocol, daisy-chain topology, interrupt-line wire-OR logic—have been inherited and evolved in some form by practically every subsequent bus-standard generation. For maintaining legacy CAMAC systems in large physics experimental facilities, the most critical task is not upgrading the bus itself but transparently integrating existing CAMAC detector front ends into modern data acquisition software frameworks (e.g., EPICS or TANGO) via CAMAC-to-Ethernet/VME bridge modules.